The present disclosure relates to a multilayer ceramic capacitor and a board having the same.
In accordance with the recent trend toward miniaturization and an increase in capacitance of electronic products, increasing demands have been made for electronic components used in electronic products to have a small size and high capacitance.
Among electronic components, in the case of a multilayer ceramic capacitor, when equivalent series inductance (hereinafter, referred to as “ESL”) increases, performance of an electronic product to which the capacitor is applied may be deteriorated. In addition, in accordance with miniaturization and an increase in capacitance of the applied electronic component, an increase in ESL of the multilayer ceramic capacitor may relatively significantly affect deterioration in performance of the electronic product.
Particularly, in accordance with an increase in performance of an integrated circuit (IC), decoupling capacitors have been increasingly used. Therefore, demand for multilayer ceramic capacitors (MLCCs) having a three-terminal vertical multilayer structure, so-called “low inductance chip capacitors (LICC)”, capable of decreasing inductance in the capacitor by decreasing a distance between external terminals to decrease a current flow path, has increased.